MODE

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Interpret as MODE

CLKSEL=APB

Module Operating Mode

CLKDIV

Input Clock Divisor.

CLKSEL

Input Clock (FCLKIN) Select.

0 (APB): Set the APB as the input clock (FCLKIN).

1 (TIMER0): Set Timer 0 low overflows divided by 2 as the input clock (FCLKIN).

2 (HL_ECI): Set high-to-low transitions on ECI divided by 2 as the input clock (FCLKIN).

3 (EXTOSCN): Set the external oscillator module output (EXTOSCn) divided by 2 as the input clock (FCLKIN).

4 (ECI): Set ECI transitions divided by 2 as the input clock (FCLKIN).

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